Date: Wed, 08 Jan 1997 21:48:18 GMT
Server: NCSA/1.4.2
Content-type: text/html

<HTML>
<head>
<title>CSE467 Syllabus</title>

</head>

<body bgcolor="#dddddd"  text="#000000"  link="#0000ee" vlink="501080" alink="ff0000">

<h1>CSE467: Advanced Logic Design</h1>
<h3>Ted Kehl, Fall 1996 </h3>

<hr>

<H3>Syllabus</H3>

We will be covering these topics, in approximately this order.

<p>
<B>Review</B>
<UL>
<LI>Combinational Logic
<LI>Structured Logic Implementations
<LI>Sequential Logic
<LI>Finite-State Machines
</UL>

<B>Implementation</B>
<UL>
<LI>Electrical Realities
<LI>Logic Families
<LI>Practical Issues: Reading Data Books, Interfacing
<LI>Fixed Function Parts
<LI>Programmable Parts
<LI>PALs and PLDs
<LI>FPGAs
</UL>

<B>Computer-Aided Design</B>
<UL>
<LI>Hardware Description Languages
<LI>Compilation into Logic
<LI>Logic Synthesis
<LI>Technology-Independent Optimizations
<LI>Technology Mapping
<LI>Sequential Synthesis
<LI>Underlying Data Structures and Algorithms
<LI>Tools for Mapping to PLDs and FPGAs
</UL>

<B>System Components</B>
<UL>
<LI>Read-mostly Memory Technologies (ROM, PROM, EPROM, EEPROM, Flash)
<LI>Static and Dynamic Memories
<LI>Memory Controllers and Timing Generation
<LI>Multi-Port Devices
<LI>Special-Purpose Memory Devices
<LI>Digital Communication
<LI>Serial and Parallel Protocols
<LI>Synchronous vs. Asynchronous Communication
<LI>Arbitration Schemes
<LI>System Busses and Bus Interface Design
<LI>Local Area Networks
</UL>

</body>
<address>
<hr>
ted@cs.washington.edu
</address>
<p>
</html>

